NXP Semiconductors freescale K51 Series Reference Manual

38.2 FTM Signal DescriptionsTable 38-1 shows the user-accessible signals for the FTM.Table 38-1. FTM Signal DescriptionsSignal Description I/OEXTCLK External clock. FTM external clock can be selected to drive the FTMcounter.ICHn FTM channel (n), where n can be 7-0 I/OFAULTj Fault input (j), where j can be 3-0 IPHA Quadrature decoder phase A input. Input pin associated with quadraturedecoder phase A.IPHB Quadrature decoder phase B input. Input pin associated with quadraturedecoder phase B.I38.2.1 EXTCLK — FTM External ClockThe external clock input signal is used as the FTM counter clock if selected byCLKS[1:0] bits in the SC register. This clock signal must not exceed 1/4 of system clockfrequency. The FTM counter prescaler selection and settings are also used when anexternal clock is selected.38.2.2 CHn — FTM Channel (n) I/O PinEach FTM channel can be configured to operate either as input or output. The directionassociated with each channel, input or output, is selected according to the mode assignedfor that channel.38.2.3 FAULTj — FTM Fault InputThe fault input signals are used to control the CHn channel output state. If a fault isdetected, the FAULTj signal is asserted and the channel output is put in a safe state. Thebehavior of the fault logic is defined by the FAULTM[1:0] control bits in the MODEregister and FAULTEN bit in the COMBINEm register. Note that each FAULTj inputmay affect all channels selectively since FAULTM[1:0] and FAULTEN control bits areFTM Signal DescriptionsK51 Sub-Family Reference Manual, Rev. 6, Nov 2011856 Freescale Semiconductor, Inc.