NXP Semiconductors freescale K51 Series Reference Manual

Each CHnF bit in STATUS is a mirror of CHnF bit in CnSC. All CHnF bits can bechecked using only one read of STATUS. All CHnF bits can be cleared by readingSTATUS followed by writing 0x00 to STATUS.Hardware sets the individual channel flags when an event occurs on the channel. CHF iscleared by reading STATUS while CHnF is set and then writing a 0 to the CHF bit.Writing a 1 to CHF has no effect.If another event occurs between the read and write operations, the write operation has noeffect; therefore, CHF remains set indicating an event has occurred. In this case a CHFinterrupt request is not lost due to the clearing sequence for a previous CHF.NOTEThe STATUS register should be used only combine mode.Addresses: FTM0_STATUS is 4003_8000h base + 50h offset = 4003_8050hFTM1_STATUS is 4003_9000h base + 50h offset = 4003_9050hFTM2_STATUS is 400B_8000h base + 50h offset = 400B_8050hBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16R 0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0 CH7F CH6F CH5F CH4F CH3F CH2F CH1F CH0FW 0 0 0 0 0 0 0 0Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FTMx_STATUS field descriptionsField Description31–8ReservedThis read-only field is reserved and always has the value zero.7CH7FChannel 7 FlagSee the register description.0 No channel event has occurred.1 A channel event has occurred.6CH6FChannel 6 FlagSee the register description.0 No channel event has occurred.1 A channel event has occurred.5CH5FChannel 5 FlagSee the register description.Table continues on the next page...Memory Map and Register DefinitionK51 Sub-Family Reference Manual, Rev. 6, Nov 2011872 Freescale Semiconductor, Inc.