NXP Semiconductors freescale K51 Series Reference Manual

UART memory mapAbsoluteaddress(hex)Register name Width(in bits) Access Reset value Section/page4006_A000 UART Baud Rate Registers:High (UART0_BDH) 8 R/W 00h 48.3.1/12234006_A001 UART Baud Rate Registers: Low (UART0_BDL) 8 R/W 04h 48.3.2/12244006_A002 UART Control Register 1 (UART0_C1) 8 R/W 00h 48.3.3/12254006_A003 UART Control Register 2 (UART0_C2) 8 R/W 00h 48.3.4/12274006_A004 UART Status Register 1 (UART0_S1) 8 R C0h 48.3.5/12294006_A005 UART Status Register 2 (UART0_S2) 8 R/W 00h 48.3.6/12324006_A006 UART Control Register 3 (UART0_C3) 8 R/W 00h 48.3.7/12344006_A007 UART Data Register (UART0_D) 8 R/W 00h 48.3.8/12354006_A008 UART Match Address Registers 1 (UART0_MA1) 8 R/W 00h 48.3.9/12374006_A009 UART Match Address Registers 2 (UART0_MA2) 8 R/W 00h 48.3.10/12374006_A00A UART Control Register 4 (UART0_C4) 8 R/W 00h 48.3.11/12384006_A00B UART Control Register 5 (UART0_C5) 8 R/W 00h 48.3.12/12394006_A00C UART Extended Data Register (UART0_ED) 8 R 00h 48.3.13/12404006_A00D UART Modem Register (UART0_MODEM) 8 R/W 00h 48.3.14/12414006_A00E UART Infrared Register (UART0_IR) 8 R/W 00h 48.3.15/12424006_A010 UART FIFO Parameters (UART0_PFIFO) 8 R/W See section 48.3.16/12434006_A011 UART FIFO Control Register (UART0_CFIFO) 8 R/W 00h 48.3.17/12454006_A012 UART FIFO Status Register (UART0_SFIFO) 8 R/W C0h 48.3.18/12464006_A013 UART FIFO Transmit Watermark (UART0_TWFIFO) 8 R/W 00h 48.3.19/12474006_A014 UART FIFO Transmit Count (UART0_TCFIFO) 8 R 00h 48.3.20/1248Table continues on the next page...Memory map and registersK51 Sub-Family Reference Manual, Rev. 6, Nov 20111214 Freescale Semiconductor, Inc.