NXP Semiconductors freescale K51 Series Reference Manual

2.3.1 ARM Cortex-M4 Core ModulesThe following core modules are available on this device.Table 2-2. Core modulesModule DescriptionARM Cortex-M4 The ARM Cortex-M4 is the newest member of the Cortex M Series of processorstargeting microcontroller cores focused on very cost sensitive, deterministic,interrupt driven environments. The Cortex M4 processor is based on the ARMv7Architecture and Thumb®-2 ISA and is upward compatible with the Cortex M3,Cortex M1, and Cortex M0 architectures. Cortex M4 improvements include anARMv7 Thumb-2 DSP (ported from the ARMv7-A/R profile architectures) providing32-bit instructions with SIMD (single instruction multiple data) DSP style multiply-accumulates and saturating arithmetic.NVIC The ARMv7-M exception model and nested-vectored interrupt controller (NVIC)implement a relocatable vector table supporting many external interrupts, a singlenon-maskable interrupt (NMI), and priority levels.The NVIC replaces shadow registers with equivalent system and simplifiedprogrammability. The NVIC contains the address of the function to execute for aparticular handler. The address is fetched via the instruction port allowing parallelregister stacking and look-up. The first sixteen entries are allocated to ARMinternal sources with the others mapping to MCU-defined interrupts.AWIC The primary function of the Asynchronous Wake-up Interrupt Controller (AWIC) isto detect asynchronous wake-up events in stop modes and signal to clock controllogic to resume system clocking. After clock restart, the NVIC observes thepending interrupt and performs the normal interrupt or event processing.Debug interfaces Most of this device's debug is based on the ARM CoreSight™ architecture. Fourdebug interfaces are supported:• IEEE 1149.1 JTAG• IEEE 1149.7 JTAG (cJTAG)• Serial Wire Debug (SWD)• ARM Real-Time Trace Interface2.3.2 System ModulesThe following system modules are available on this device.Table 2-3. System modulesModule DescriptionSystem integration module (SIM) The SIM includes integration logic and several module configuration settings.Mode controller The MC provides control and protection on entry and exit to each power mode,control for the Power management controller (PMC), and reset entry and exit forthe complete MCU.Table continues on the next page...Chapter 2 IntroductionK51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 57