NXP Semiconductors freescale K51 Series Reference Manual

UARTx_S1 field descriptions (continued)Field DescriptionOR is set when software fails to prevent the receive data register from overflowing with data. The OR bitis set immediately after the stop bit has been completely received for the dataword that overflows thebuffer and all the other error flags (FE,NF and PF) are prevented from setting. The data in the shiftregister is lost, but the data already in the UART data registers is not affected. If the OR flag is set, nodata will be stored in the data buffer even if sufficient room exists. Additionally, while the OR flag is set theRDRF flag, and IDLE flags will be blocked from asserting, i.e. transition from an inactive to an active state.To clear OR, read S1 when OR is set and then read UART data register (D). If LBKDE is enabled and aLIN Break is detected, the OR bit will assert if the S2[LBKDIF] flag is not cleared before the next datacharacter is received.See Overrun (OR) flag implications for more details regarding the operation of theOR bit. In 7816 mode, it is possible to configure a NACK to be returned by programing theC7816[ONACK] bit.0 No overrun has occurred since the last time the flag was cleared.1 Overrun has occurred or the overrun flag has not been cleared since the last overrun occured.2NFNoise FlagNF is set when the UART detects noise on the receiver input. NF bit does not get set in the case of anoverrun or while the LIN break detect feature is enabled (S2[LBKDE] = 1). When NF is set, it onlyindicates that a dataword has been received with noise since the last time it was cleared. There is noguarantee that the first dataword read from the receive buffer has noise or that there is only one datawordin the buffer that was received with noise unless the receive buffer has a depth of one. To clear NF, readS1 and then read the UART data register (D).0 No noise detected since the last time this flag was cleared. If the receive buffer has a depth greaterthan 1 then there may be data in the receiver buffer that was received with noise.1 At least one dataword was received with noise detected since the last time the flag was cleared.1FEFraming Error FlagFE is set when a logic 0 is accepted as the stop bit. FE bit does not set in the case of an overrun or whilethe LIN break detect feature is enabled (S2[LBKDE] = 1). FE inhibits further data reception until it iscleared. To clear FE, read S1 with FE set and then read the UART data register (D). The last data in thereceive buffer represents the data that was received with the frame error enabled. However, framingerrors are not supported when 7816E is set/enabled. However, if this flag is set, data will still not bereceived in 7816 mode.0 No framing error detected.1 Framing error.0PFParity Error FlagPF is set when PE is set, S2[LBKDE] is disabled, and the parity of the received data does not match itsparity bit. The PF is not set in the case of an overrun condition. When the PF bit is set it only indicates thata dataword was received with parity error since the last time it was cleared. There is no guarantee that thefirst dataword read from the receive buffer has a parity error or that there is only one dataword in thebuffer that was received with a parity error unless the receive buffer was a depth of one. To clear PF, readS1 and then read the UART data register (D). Within the receive buffer structure the received dataword istagged if it was received with a parity error. That information is available by reading the ED register priorto reading the D register.0 No parity error has been detected since the last time this flag was cleared. If the receive buffer has adepth greater than 1 then there may be data in the receive buffer what was received with a parityerror.1 At least one dataword was received with a parity error since the last time this flag was cleared.Chapter 48 Universal Asynchronous Receiver/Transmitter (UART)K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 1231