NXP Semiconductors freescale K51 Series Reference Manual

FTMx_COMBINE field descriptions (continued)Field Description0 The channel (n+1) output is the same as the channel (n) output.1 The channel (n+1) output is the complement of the channel (n) output.16COMBINE2Combine Channels for n = 4Enables the combine feature for channels (n) and (n+1).This field is write protected. It can be written only when MODE[WPDIS] = 1.0 Channels (n) and (n+1) are independent.1 Channels (n) and (n+1) are combined.15ReservedThis read-only field is reserved and always has the value zero.14FAULTEN1Fault Control Enable for n = 2Enables the fault control in channels (n) and (n+1).This field is write protected. It can be written only when MODE[WPDIS] = 1.0 The fault control in this pair of channels is disabled.1 The fault control in this pair of channels is enabled.13SYNCEN1Synchronization Enable for n = 2Enables PWM synchronization of registers C(n)V and C(n+1)V.0 The PWM synchronization in this pair of channels is disabled.1 The PWM synchronization in this pair of channels is enabled.12DTEN1Deadtime Enable for n = 2Enables the deadtime insertion in the channels (n) and (n+1).This field is write protected. It can be written only when MODE[WPDIS] = 1.0 The deadtime insertion in this pair of channels is disabled.1 The deadtime insertion in this pair of channels is enabled.11DECAP1Dual Edge Capture Mode Captures for n = 2Enables the capture of the FTM counter value according to the channel (n) input event and theconfiguration of the dual edge capture bits.This field applies only when FTMEN = 1 and DECAPEN = 1.DECAP bit is cleared automatically by hardware if dual edge capture – one-shot mode is selected andwhen the capture of channel (n+1) event is made.0 The dual edge captures are inactive.1 The dual edge captures are active.10DECAPEN1Dual Edge Capture Mode Enable for n = 2Enables the dual edge capture mode in the channels (n) and (n+1). This bit reconfigures the function ofMSnA, ELSnB:ELSnA and ELS(n+1)B:ELS(n+1)A bits in dual edge capture mode according to Table38-7.This field applies only when FTMEN = 1.This field is write protected. It can be written only when MODE[WPDIS] = 1.Table continues on the next page...Memory Map and Register DefinitionK51 Sub-Family Reference Manual, Rev. 6, Nov 2011884 Freescale Semiconductor, Inc.