NXP Semiconductors freescale K51 Series Reference Manual

24.3.6 MCG Control 6 Register (MCG_C6)Address: MCG_C6 is 4006_4000h base + 5h offset = 4006_4005hBit 7 6 5 4 3 2 1 0Read LOLIE PLLS CME VDIVWriteReset 0 0 0 0 0 0 0 0MCG_C6 field descriptionsField Description7LOLIELoss of Lock Interrrupt EnableDetermines if an interrupt request is made following a loss of lock indication. This bit only has an effectwhen LOLS is set.0 No interrupt request is generated on loss of lock.1 Generate an interrupt request on loss of lock.6PLLSPLL SelectControls whether the PLL or FLL output is selected as the MCG source when CLKS[1:0]=00. If the PLLSbit is cleared and PLLCLKEN is not set, the PLL is disabled in all modes. If the PLLS is set, the FLL isdisabled in all modes.0 FLL is selected.1 PLL is selected (PRDIV need to be programmed to the correct divider to generate a PLL referenceclock in the range of 2 - 4 MHz prior to setting the PLLS bit).5CMEClock Monitor EnableDetermines if a reset request is made following a loss of external clock indication. The CME bit shouldonly be set to a logic 1 when the MCG is in an operational mode that uses the external clock (FEE, FBE,PEE, PBE, or BLPE). Whenever the CME bit is set to a logic 1, the value of the RANGE bits in the C2register should not be changed. CME bit should be set to a logic 0 before the MCG enters any Stopmode. Otherwise, a reset request may occur while in Stop mode. CME should also be set to a logic 0before entering VLPR or VLPW power modes if the MCG is in BLPE mode.0 External clock monitor is disabled.1 Generate a reset request on loss of external clock.4–0VDIVVCO DividerSelects the amount to divide the VCO output of the PLL. The VDIV bits establish the multiplication factor(M) applied to the reference clock frequency. After the PLL is enabled (by setting either PLLCLKEN orPLLS), the VDIV value must not be changed when LOCK is zero.Table 24-9. PLL VCO Divide FactorVDIV MultiplyFactorVDIV MultiplyFactorVDIV MultiplyFactorVDIV MultiplyFactor00000 24 01000 32 10000 40 11000 48Table continues on the next page...Memory Map/Register DefinitionK51 Sub-Family Reference Manual, Rev. 6, Nov 2011536 Freescale Semiconductor, Inc.