NXP Semiconductors freescale K51 Series Reference Manual

3. Configure a timer for the desired trigger interval4. Write 0xC5 to CHCFG2 (base address + 0x02)The following code example illustrates steps #1 and #4 above:In File registers.h:#define DMAMUX_BASE_ADDR 0xFC084000/* Example only ! *//* Following example assumes char is 8-bits */volatile unsigned char *CHCONFIG0 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0000);volatile unsigned char *CHCONFIG1 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0001);volatile unsigned char *CHCONFIG2 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0002);volatile unsigned char *CHCONFIG3 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0003);volatile unsigned char *CHCONFIG4 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0004);volatile unsigned char *CHCONFIG5 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0005);volatile unsigned char *CHCONFIG6 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0006);volatile unsigned char *CHCONFIG7 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0007);volatile unsigned char *CHCONFIG8 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0008);volatile unsigned char *CHCONFIG9 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0009);volatile unsigned char *CHCONFIG10= (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x000A);volatile unsigned char *CHCONFIG11= (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x000B);volatile unsigned char *CHCONFIG12= (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x000C);volatile unsigned char *CHCONFIG13= (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x000D);volatile unsigned char *CHCONFIG14= (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x000E);volatile unsigned char *CHCONFIG15= (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x000F);In File main.c:#include "registers.h"::*CHCONFIG2 = 0x00;*CHCONFIG2 = 0xC5;Enabling a source without periodic triggering1. Determine with which DMA channel the source will be associated. Note that only thefirst 4 DMA channels have periodic triggering capability2. Clear the CHCFG[ENBL] and CHCFG[TRIG] bits of the DMA channel3. Ensure that the DMA channel is properly configured in the DMA. The DMA channelmay be enabled at this point4. Select the source to be routed to the DMA channel. Write to the correspondingCHCFG register, ensuring that the CHCFG[ENBL] is set while the CHCFG[TRIG]bit is clearedConfigure source #5 Transmit for use with DMA channel 2, with no periodic triggeringcapability.1. Write 0x00 to CHCFG2 (base address + 0x02)2. Configure channel 2 in the DMA, including enabling the channel3. Write 0x85 to CHCFG2 (base address + 0x02)The following code example illustrates steps #1 and #3 above:In File registers.h:#define DMAMUX_BASE_ADDR 0xFC084000/* Example only ! *//* Following example assumes char is 8-bits */volatile unsigned char *CHCONFIG0 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0000);volatile unsigned char *CHCONFIG1 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0001);volatile unsigned char *CHCONFIG2 = (volatile unsigned char *) (DMAMUX_BASE_ADDR+0x0002);Initialization/application informationK51 Sub-Family Reference Manual, Rev. 6, Nov 2011412 Freescale Semiconductor, Inc.