NXP Semiconductors freescale K51 Series Reference Manual

starts, which is 31 bytes, more than 6 words. The host driver writer may take this variableburst length into account. It is also acceptable to configure the burst length as the divisorof the block size, so that each time the burst length will be the same.49.5.2.3 Crossbar switch master interfaceIt is possible that the internal DMA engine could fail during the data transfer. When thiserror occurs, the DMA engine stops the transfer and goes to the idle state as well as theinternal data buffer stops accepting incoming data. The IRQSTAT[DMAE] is set toinform the driver.Once the DMAE interrupt is received, the software shall send a CMD12 to abort thecurrent transfer and read the DSADDR[DSADDR] to get the starting address of thecorrupted block. After the DMA error is fixed, the software should apply a data reset andre-start the transfer from this address to recover the corrupted block.49.5.2.4 ADMA engineIn the SD host controller standard, the new DMA transfer algorithm called the ADMA(advanced DMA) is defined. For simple DMA, once the page boundary is reached, aDMA interrupt will be generated and the new system address shall be programmed by thehost driver. The ADMA defines the programmable descriptor table in the systemmemory. The host driver can calculate the system address at the page boundary andprogram the descriptor table before executing ADMA. It reduces the frequency ofinterrupts to the host system. Therefore, higher speed DMA transfers could be realizedsince the host MCU intervention would not be needed during long DMA based datatransfers.There are two types of ADMA: ADMA1 and ADMA2 in host controller. ADMA1 cansupport data transfer of 4 KB aligned data in system memory. ADMA2 improves therestriction so that data of any location and any size can be transferred in system memory.Their formats of descriptor table are different.ADMA can recognize all kinds of descriptors define in SD host controller standard, andif 'end' flag is detected in the descriptor, ADMA will stop after this descriptor isprocessed.49.5.2.4.1 ADMA concept and descriptor formatFor ADMA1, including the following descriptors:Functional descriptionK51 Sub-Family Reference Manual, Rev. 6, Nov 20111364 Freescale Semiconductor, Inc.