NXP Semiconductors freescale K51 Series Reference Manual

Address: LLWU_PE1 is 4007_C000h base + 0h offset = 4007_C000hBit 7 6 5 4 3 2 1 0Read WUPE3 WUPE2 WUPE1 WUPE0WriteReset 0 0 0 0 0 0 0 0LLWU_PE1 field descriptionsField Description7–6WUPE3Wakeup Pin Enable for LLWU_P3Enables and configures the edge detection for the wakeup pin.00 External input pin disabled as wakeup input01 External input pin enabled with rising edge detection10 External input pin enabled with falling edge detection11 External input pin enabled with any change detection5–4WUPE2Wakeup Pin Enable for LLWU_P2Enables and configures the edge detection for the wakeup pin.00 External input pin disabled as wakeup input01 External input pin enabled with rising edge detection10 External input pin enabled with falling edge detection11 External input pin enabled with any change detection3–2WUPE1Wakeup Pin Enable for LLWU_P1Enables and configures the edge detection for the wakeup pin.00 External input pin disabled as wakeup input01 External input pin enabled with rising edge detection10 External input pin enabled with falling edge detection11 External input pin enabled with any change detection1–0WUPE0Wakeup Pin Enable for LLWU_P0Enables and configures the edge detection for the wakeup pin.00 External input pin disabled as wakeup input01 External input pin enabled with rising edge detection10 External input pin enabled with falling edge detection11 External input pin enabled with any change detection15.3.2 LLWU Pin Enable 2 Register (LLWU_PE2)LLWU_PE2 contains the bit field to enable and select the edge detect type for theexternal wakeup input pins LLWU_P7-LLWU_P4.Memory map/register definitionK51 Sub-Family Reference Manual, Rev. 6, Nov 2011326 Freescale Semiconductor, Inc.