NXP Semiconductors freescale K51 Series Reference Manual

TOF bit... 7 8 87 7 76 6 65 5 54 43 32 21 0 1 ...previous valueCNTchannel (n) outputcounteroverflowchannel (n) match indown counting channel (n) match inup countingchannel (n) match indown countingcounteroverflowCHnF bitMOD = 0x0008CnV = 0x0005Figure 38-185. CPWM Signal with ELSnB:ELSnA = 1:0If (ELSnB:ELSnA = X:1), then the channel (n) output is forced low at the channel (n)match (FTM counter = CnV) when counting down, and it is forced high at the channel (n)match when counting up (see the following figure).TOF bit... 7 8 87 7 76 6 65 5 54 43 32 21 0 1 ...previous valueCNTchannel (n) outputcounteroverflowchannel (n) match indown counting channel (n) match inup counting channel (n) match indown countingcounteroverflowCHnF bitMOD = 0x0008CnV = 0x0005Figure 38-186. CPWM Signal with ELSnB:ELSnA = X:1If (CnV = 0x0000) or (CnV is a negative value, that is, CnV[15] = 1) then the channel (n)output is a 0% duty cycle CPWM signal and CHnF bit is not set even when there is thechannel (n) match.If (CnV is a positive value, that is, CnV[15] = 0), (CnV ≥ MOD), and (MOD ≠ 0x0000),then the channel (n) output is a 100% duty cycle CPWM signal and CHnF bit is not seteven when there is the channel (n) match. This implies that the usable range of periodsset by MOD is 0x0001 through 0x7FFE (0x7FFF if you do not need to generate a 100%duty cycle CPWM signal). This is not a significant limitation because the resulting periodis much longer than required for normal applications.The CPWM mode must not be used when the FTM counter is a free running counter.NoteIt is expected that the CPWM mode be used only with CNTIN= 0x0000.Functional DescriptionK51 Sub-Family Reference Manual, Rev. 6, Nov 2011922 Freescale Semiconductor, Inc.