NXP Semiconductors freescale K51 Series Reference Manual

supply pins. In these cases, there are separate pads for the analog supplies bonded to thesame pin as the corresponding digital supply so that some degree of isolation between thesupplies is maintained.When available on a separate pin, both VDDA and VSSA must be connected to the samevoltage potential as their corresponding MCU digital supply (VDD and VSS) and must berouted carefully for maximum noise immunity and bypass capacitors placed as near aspossible to the package.If separate power supplies are used for analog and digital power, the ground connectionbetween these supplies must be at the VSSA pin. This should be the only groundconnection between these supplies if possible. The VSSA pin makes a good single pointground location.31.6.1.2 Analog voltage reference pinsIn addition to the analog supplies, the ADC module has connections for two referencevoltage inputs used by the converter, VREFSH and VREFSL. VREFSH is the high referencevoltage for the converter. VREFSL is the low reference voltage for the converter.The ADC can be configured to accept one of two voltage reference pairs for VREFSH andVREFSL. Each pair contains a positive reference and a ground reference. The two pairs areexternal (VREFH and VREFL) and alternate (VALTH and VALTL). These voltage referencesare selected using the REFSEL bits in the SC2 register. The alternate (VALTH and VALTL)voltage reference pair may select additional external pins or internal sources dependingon MCU configuration. Refer to the Chip Configuration information on the VoltageReferences specific to this MCU.In some packages, the external or alternate pairs are connected in the package to VDDAand VSSA, respectively. One of these positive references may be shared on the same pinas VDDA on some devices. One of these ground references may be shared on the same pinas VSSA on some devices.If externally available, the positive reference may be connected to the same potential asVDDA or may be driven by an external source to a level between the minimum RefVoltage High and the VDDA potential (the positive reference must never exceed VDDA). Ifexternally available, the ground reference must be connected to the same voltagepotential as VSSA. The voltage reference pairs must be routed carefully for maximumnoise immunity and bypass capacitors placed as near as possible to the package.AC current in the form of current spikes required to supply charge to the capacitor arrayat each successive approximation step is drawn through the VREFH and VREFL loop. Thebest external component to meet this current demand is a 0.1 μF capacitor with good highApplication informationK51 Sub-Family Reference Manual, Rev. 6, Nov 2011752 Freescale Semiconductor, Inc.