NXP Semiconductors freescale K51 Series Reference Manual

Section Number Title Page40.3 Memory map and register definition.............................................................................................................................99940.3.1 Low Power Timer Control Status Register (LPTMRx_CSR)......................................................................100040.3.2 Low Power Timer Prescale Register (LPTMRx_PSR)................................................................................100140.3.3 Low Power Timer Compare Register (LPTMRx_CMR).............................................................................100340.3.4 Low Power Timer Counter Register (LPTMRx_CNR)...............................................................................100340.4 Functional description...................................................................................................................................................100440.4.1 LPTMR power and reset..............................................................................................................................100440.4.2 LPTMR clocking..........................................................................................................................................100440.4.3 LPTMR prescaler/glitch filter......................................................................................................................100540.4.4 LPTMR compare..........................................................................................................................................100640.4.5 LPTMR counter...........................................................................................................................................100640.4.6 LPTMR hardware trigger.............................................................................................................................100740.4.7 LPTMR interrupt..........................................................................................................................................1007Chapter 41Carrier Modulator Transmitter (CMT)41.1 Introduction...................................................................................................................................................................100941.2 Features.........................................................................................................................................................................100941.3 Block Diagram..............................................................................................................................................................101041.4 Modes of Operation......................................................................................................................................................101141.4.1 Wait Mode Operation...................................................................................................................................101241.4.2 Stop Mode Operation...................................................................................................................................101241.5 CMT External Signal Descriptions...............................................................................................................................101341.5.1 CMT_IRO — Infrared Output.....................................................................................................................101341.6 Memory Map/Register Definition.................................................................................................................................101341.6.1 CMT Carrier Generator High Data Register 1 (CMT_CGH1)....................................................................101441.6.2 CMT Carrier Generator Low Data Register 1 (CMT_CGL1).....................................................................101541.6.3 CMT Carrier Generator High Data Register 2 (CMT_CGH2)....................................................................101641.6.4 CMT Carrier Generator Low Data Register 2 (CMT_CGL2).....................................................................101641.6.5 CMT Output Control Register (CMT_OC).................................................................................................1017K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 35