NXP Semiconductors freescale K51 Series Reference Manual

Section Number Title Page37.3.5 Channel n Control Register 1 (PDBx_CHnC1)...........................................................................................83937.3.6 Channel n Status Register (PDBx_CHnS)...................................................................................................84037.3.7 Channel n Delay 0 Register (PDBx_CHnDLY0)........................................................................................84137.3.8 Channel n Delay 1 Register (PDBx_CHnDLY1)........................................................................................84137.3.9 DAC Interval Trigger n Control Register (PDBx_DACINTCn).................................................................84237.3.10 DAC Interval n Register (PDBx_DACINTn)..............................................................................................84237.3.11 Pulse-Out n Enable Register (PDBx_POEN)...............................................................................................84337.3.12 Pulse-Out n Delay Register (PDBx_POnDLY)...........................................................................................84337.4 Functional Description..................................................................................................................................................84437.4.1 PDB Pre-trigger and Trigger Outputs..........................................................................................................84437.4.2 PDB Trigger Input Source Selection...........................................................................................................84637.4.3 DAC Interval Trigger Outputs.....................................................................................................................84637.4.4 Pulse-Out's...................................................................................................................................................84737.4.5 Updating the Delay Registers......................................................................................................................84737.4.6 Interrupts......................................................................................................................................................84937.4.7 DMA............................................................................................................................................................84937.5 Application Information................................................................................................................................................84937.5.1 Impact of Using the Prescaler and Multiplication Factor on Timing Resolution........................................849Chapter 38FlexTimer (FTM)38.1 Introduction...................................................................................................................................................................85138.1.1 FlexTimer Philosophy..................................................................................................................................85138.1.2 Features........................................................................................................................................................85238.1.3 Modes of Operation.....................................................................................................................................85338.1.4 Block Diagram.............................................................................................................................................85338.2 FTM Signal Descriptions..............................................................................................................................................85638.2.1 EXTCLK — FTM External Clock...............................................................................................................85638.2.2 CHn — FTM Channel (n) I/O Pin...............................................................................................................85638.2.3 FAULTj — FTM Fault Input.......................................................................................................................856K51 Sub-Family Reference Manual, Rev. 6, Nov 2011Freescale Semiconductor, Inc. 31