Section number Title Page15.5.1 Low Voltage Detect Status And Control 1 register (PMC_LVDSC1).......................................................... 24415.5.2 Low Voltage Detect Status And Control 2 register (PMC_LVDSC2).......................................................... 24515.5.3 Regulator Status And Control register (PMC_REGSC)................................................................................ 246Chapter 16Miscellaneous Control Module (MCM)16.1 Introduction...................................................................................................................................................................24916.1.1 Features.......................................................................................................................................................... 24916.2 Memory map/register descriptions............................................................................................................................... 24916.2.1 Crossbar Switch (AXBS) Slave Configuration (MCM_PLASC)..................................................................25016.2.2 Crossbar Switch (AXBS) Master Configuration (MCM_PLAMC).............................................................. 25016.2.3 Platform Control Register (MCM_PLACR)..................................................................................................25116.2.4 Compute Operation Control Register (MCM_CPO)..................................................................................... 254Chapter 17Crossbar Switch Lite (AXBS-Lite)17.1 Chip-specific AXBS-Lite information..........................................................................................................................25717.1.1 Crossbar-light switch master assignments..................................................................................................... 25717.1.2 Crossbar switch slave assignments................................................................................................................ 25717.2 Introduction...................................................................................................................................................................25717.2.1 Features.......................................................................................................................................................... 25817.3 Memory Map / Register Definition...............................................................................................................................25817.4 Functional Description..................................................................................................................................................25817.4.1 General operation........................................................................................................................................... 25817.4.2 Arbitration...................................................................................................................................................... 25917.5 Initialization/application information........................................................................................................................... 261Chapter 18Low-Leakage Wakeup Unit (LLWU)18.1 LLWU interrupt............................................................................................................................................................ 26318.1.1 Wake-up Sources........................................................................................................................................... 26318.2 Introduction...................................................................................................................................................................26418.2.1 Features.......................................................................................................................................................... 264KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 11
