Each pin can be individually configured for any of the following external interruptmodes:• Interrupt disabled, default out of reset• Active high level sensitive interrupt• Active low level sensitive interrupt• Rising edge sensitive interrupt• Falling edge sensitive interrupt• Rising and falling edge sensitive interrupt• Rising edge sensitive DMA request• Falling edge sensitive DMA request• Rising and falling edge sensitive DMA requestThe interrupt status flag is set when the configured edge or level is detected on the pin .When not in Stop mode, the input is first synchronized to the bus clock to detect theconfigured level or edge transition.The PORT module generates a single interrupt that asserts when the interrupt status flagis set for any enabled interrupt for that port. The interrupt negates after the interrupt statusflags for all enabled interrupts have been cleared by writing a logic 1 to the ISF flag ineither the PORT_ISFR or PORT_PCRn registers.The PORT module generates a single DMA request that asserts when the interrupt statusflag is set for any enabled DMA request in that port. The DMA request negates after theDMA transfer is completed, because that clears the interrupt status flags for all enabledDMA requests.During Stop mode, the interrupt status flag for any enabled interrupt is asynchronouslyset if the required level or edge is detected. This also generates an asynchronous wake-upsignal to exit the Low-Power mode.Chapter 11 Port Control and Interrupts (PORT)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 141
