32QFN48QFN64MAPBGA64LQFPPin Name Default ALT0 ALT1 ALT2 ALT3 ALT4 ALT5 ALT6 ALT71 — A1 1 PTE0 DISABLED PTE0/CLKOUT32KSPI1_MISO LPUART1_TXRTC_CLKOUTCMP0_OUT I2C1_SDA2 2 C4 4 VSS VSS VSS3 3 E1 5 USB0_DP USB0_DP USB0_DP4 4 D1 6 USB0_DM USB0_DM USB0_DM5 5 E2 7 VOUT33 VOUT33 VOUT336 6 D2 8 VREGIN VREGIN VREGIN7 9 F4 13 VDDA VDDA VDDA8 12 F3 16 VSSA VSSA VSSA9 14 H2 18 PTE30 DAC0_OUT/ADC0_SE23/CMP0_IN4DAC0_OUT/ADC0_SE23/CMP0_IN4PTE30 TPM0_CH3 TPM_CLKIN1 LPUART1_TXLPTMR0_ALT110 17 D3 22 PTA0 SWD_CLK PTA0 TPM0_CH5 SWD_CLK11 18 D4 23 PTA1 DISABLED PTA1 LPUART0_RXTPM2_CH012 19 E5 24 PTA2 DISABLED PTA2 LPUART0_TXTPM2_CH113 20 D5 25 PTA3 SWD_DIO PTA3 I2C1_SCL TPM0_CH0 SWD_DIO14 21 G5 26 PTA4 NMI_b PTA4 I2C1_SDA TPM0_CH1 NMI_b15 22 G7 30 VDD VDD VDD16 23 H7 31 VSS VSS VSS17 24 H8 32 PTA18 EXTAL0 EXTAL0 PTA18 LPUART1_RXTPM_CLKIN018 25 G8 33 PTA19 XTAL0 XTAL0 PTA19 LPUART1_TXTPM_CLKIN1 LPTMR0_ALT119 26 F8 34 PTA20 RESET_b PTA20 RESET_b20 27 F7 35 PTB0/LLWU_P5ADC0_SE8 ADC0_SE8 PTB0/LLWU_P5I2C0_SCL TPM1_CH021 28 F6 36 PTB1 ADC0_SE9 ADC0_SE9 PTB1 I2C0_SDA TPM1_CH122 34 C6 44 PTC1/LLWU_P6/RTC_CLKINADC0_SE15 ADC0_SE15 PTC1/LLWU_P6/RTC_CLKINI2C1_SCL TPM0_CH0 I2S0_TXD023 35 B7 45 PTC2 ADC0_SE11 ADC0_SE11 PTC2 I2C1_SDA TPM0_CH1 I2S0_TX_FS24 36 C8 46 PTC3/LLWU_P7DISABLED PTC3/LLWU_P7SPI1_SCK LPUART1_RXTPM0_CH2 CLKOUT I2S0_TX_BCLK25 37 B8 49 PTC4/LLWU_P8DISABLED PTC4/LLWU_P8SPI0_SS LPUART1_TXTPM0_CH3 I2S0_MCLK26 38 A8 50 PTC5/LLWU_P9DISABLED PTC5/LLWU_P9SPI0_SCK LPTMR0_ALT2I2S0_RXD0 CMP0_OUT27 39 A7 51 PTC6/LLWU_P10CMP0_IN0 CMP0_IN0 PTC6/LLWU_P10SPI0_MOSI EXTRG_IN I2S0_RX_BCLKSPI0_MISO I2S0_MCLK28 40 B6 52 PTC7 CMP0_IN1 CMP0_IN1 PTC7 SPI0_MISO audioUSB_SOF_OUTI2S0_RX_FS SPI0_MOSI29 45 A3 61 PTD4/LLWU_P14DISABLED PTD4/LLWU_P14SPI1_SS UART2_RX TPM0_CH4 FXIO0_D4KL27 Signal Multiplexing and Pin AssignmentsKL27 Sub-Family Reference Manual , Rev. 5, 01/2016114 Freescale Semiconductor, Inc.
