29.4.1 Status and Control (TPMx_SC)SC contains the overflow status flag and control bits used to configure the interruptenable, module configuration and prescaler factor. These controls relate to all channelswithin this module.Address: Base address + 0h offsetBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16R 0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0DMATOFTOIECPWMSCMOD PSW w1cReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TPMx_SC field descriptionsField Description31–9ReservedThis field is reserved.This read-only field is reserved and always has the value 0.8DMADMA EnableEnables DMA transfers for the overflow flag.0 Disables DMA transfers.1 Enables DMA transfers.7TOFTimer Overflow FlagSet by hardware when the TPM counter equals the value in the MOD register and increments. Writing a 1to TOF clears it. Writing a 0 to TOF has no effect.If another TPM overflow occurs between the flag setting and the flag clearing, the write operation has noeffect; therefore, TOF remains set indicating another overflow has occurred. In this case a TOF interruptrequest is not lost due to a delay in clearing the previous TOF.Table continues on the next page...Chapter 29 Timer/PWM Module (TPM)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 463
