15.5.1 Low Voltage Detect Status And Control 1 register(PMC_LVDSC1)This register contains status and control bits to support the low voltage detect function.This register should be written during the reset initialization program to set the desiredcontrols even if the desired settings are the same as the reset settings.While the device is in the very low power or low leakage modes, the LVD system isdisabled regardless of LVDSC1 settings. To protect systems that must have LVD alwayson, configure the Power Mode Protection (PMPROT) register of the SMC module(SMC_PMPROT) to disallow any very low power or low leakage modes from beingenabled.See the device's data sheet for the exact LVD trip voltages.NOTEThe LVDV bits are reset solely on a POR Only event. Theregister's other bits are reset on Chip Reset Not VLLS. Formore information about these reset types, refer to the Resetsection details.Address: 4007_D000h base + 0h offset = 4007_D000hBit 7 6 5 4 3 2 1 0Read LVDF 0 LVDIE LVDRE 0 LVDVWrite LVDACKReset 0 0 0 1 0 0 0 0PMC_LVDSC1 field descriptionsField Description7LVDFLow-Voltage Detect FlagThis read-only status field indicates a low-voltage detect event.0 Low-voltage event not detected1 Low-voltage event detected6LVDACKLow-Voltage Detect AcknowledgeThis write-only field is used to acknowledge low voltage detection errors. Write 1 to clear LVDF. Readsalways return 0.5LVDIELow-Voltage Detect Interrupt EnableEnables hardware interrupt requests for LVDF.0 Hardware interrupt disabled (use polling)1 Request a hardware interrupt when LVDF = 1Table continues on the next page...Memory map and register descriptionsKL27 Sub-Family Reference Manual , Rev. 5, 01/2016244 Freescale Semiconductor, Inc.
