33.5.10 Control register (USBx_CTL)Provides various control and configuration information for the USB module.Address: 4007_2000h base + 94h offset = 4007_2094hBit 7 6 5 4Read JSTATE SE0 TXSUSPENDTOKENBUSY0WriteReset 0 0 0 0Bit 3 2 1 0Read 0 ODDRST USBENSOFENWriteReset 0 0 0 0USBx_CTL field descriptionsField Description7JSTATELive USB differential receiver JSTATE signalThe polarity of this signal is affected by the current state of LSEN .6SE0Live USB Single Ended Zero signal5TXSUSPENDTOKENBUSYIn Target mode, TXD_SUSPEND is set when the SIE has disabled packet transmission andreception. Clearing this bit allows the SIE to continue token processing. This bit is set by theSIE when a SETUP Token is received allowing software to dequeue any pending packettransactions in the BDT before resuming token processing.4–2ReservedThis field is reserved.This read-only field is reserved and always has the value 0.1ODDRSTSetting this bit to 1 resets all the BDT ODD ping/pong fields to 0, which then specifies theEVEN BDT bank.0USBENSOFENUSB EnableSetting this bit enables the USB-FS to operate; clearing it disables the USB-FS. Setting the bitcauses the SIE to reset all of its ODD bits to the BDTs. Therefore, setting this bit resets muchof the logic in the SIE.0 Disables the USB Module.1 Enables the USB Module.Memory map/Register definitionsKL27 Sub-Family Reference Manual , Rev. 5, 01/2016550 Freescale Semiconductor, Inc.
