SIM_FCFG1 field descriptions (continued)Field Description23–2ReservedThis field is reserved.This read-only field is reserved and always has the value 0.1FLASHDOZEFlash DozeWhen set, flash memory is disabled for the duration of Doze mode. This field must be clear during VLPmodes. The flash will be automatically enabled again at the end of Doze mode so interrupt vectors do notneed to be relocated out of flash memory. The wake-up time from Doze mode is extended when this fieldis set. An attempt by the DMA or other bus master to access the flash memory when the flash is disabledwill result in a bus error.0 Flash remains enabled during Doze mode.1 Flash is disabled for the duration of Doze mode.0FLASHDISFlash DisableFlash accesses are disabled (and generate a bus error) and the flash memory is placed in a low-powerstate. This field should not be changed during VLP modes. Relocate the interrupt vectors out of Flashmemory before disabling the Flash.0 Flash is enabled.1 Flash is disabled.12.3.14 Flash Configuration Register 2 (SIM_FCFG2)This is read only register, any write to this register will cause transfer error.Address: 4004_7000h base + 1050h offset = 4004_8050hBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16R 0 MAXADDR0 1 MAXADDR1WReset 0 * * * * * * * 1 * * * * * * *Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0* Notes:MAXADDR0 field: Device specific value indicating amount of implemented flash.•MAXADDR1 field: Device specific value indicating amount of implemented flash.•Chapter 12 System Integration Module (SIM)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 165
