LPUARTx_CTRL field descriptions (continued)Field Description29TXDIRLPUART_TX Pin Direction in Single-Wire ModeWhen the LPUART is configured for single-wire half-duplex operation (LOOPS = RSRC = 1), this bitdetermines the direction of data at the LPUART_TX pin. When clearing TXDIR, the transmitter will finishreceiving the current character (if any) before the receiver starts receiving data from the LPUART_TX pin.0 LPUART_TX pin is an input in single-wire mode.1 LPUART_TX pin is an output in single-wire mode.28TXINVTransmit Data InversionSetting this bit reverses the polarity of the transmitted data output.NOTE: Setting TXINV inverts the LPUART_TX output for all cases: data bits, start and stop bits, break,and idle.0 Transmit data not inverted.1 Transmit data inverted.27ORIEOverrun Interrupt EnableThis bit enables the overrun flag (OR) to generate hardware interrupt requests.0 OR interrupts disabled; use polling.1 Hardware interrupt requested when OR is set.26NEIENoise Error Interrupt EnableThis bit enables the noise flag (NF) to generate hardware interrupt requests.0 NF interrupts disabled; use polling.1 Hardware interrupt requested when NF is set.25FEIEFraming Error Interrupt EnableThis bit enables the framing error flag (FE) to generate hardware interrupt requests.0 FE interrupts disabled; use polling.1 Hardware interrupt requested when FE is set.24PEIEParity Error Interrupt EnableThis bit enables the parity error flag (PF) to generate hardware interrupt requests.0 PF interrupts disabled; use polling).1 Hardware interrupt requested when PF is set.23TIETransmit Interrupt EnableEnables STAT[TDRE] to generate interrupt requests.0 Hardware interrupts from TDRE disabled; use polling.1 Hardware interrupt requested when TDRE flag is 1.22TCIETransmission Complete Interrupt Enable forTCIE enables the transmission complete flag, TC, to generate interrupt requests.0 Hardware interrupts from TC disabled; use polling.1 Hardware interrupt requested when TC flag is 1.Table continues on the next page...Chapter 37 Low Power Universal asynchronous receiver/transmitter (LPUART)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 659
