Unused bits in R n are cleared in unsigned right-aligned modes and carry the sign bit(MSB) in sign-extended 2's complement modes. For example, when configured for 10-bitsingle-ended mode, D[15:10] are cleared. When configured for 11-bit differential mode,D[15:10] carry the sign bit, that is, bit 10 extended through bit 15.The following table describes the behavior of the data result registers in the differentmodes of operation.Table 23-4. Data result register descriptionConversionmodeD15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Format16-bit differential S D D D D D D D D D D D D D D D Signed 2'scomplement16-bit single-endedD D D D D D D D D D D D D D D D Unsigned rightjustified13-bit differential S S S S D D D D D D D D D D D D Sign-extended2's complement12-bit single-ended0 0 0 0 D D D D D D D D D D D D Unsigned right-justified11-bit differential S S S S S S D D D D D D D D D D Sign-extended2's complement10-bit single-ended0 0 0 0 0 0 D D D D D D D D D D Unsigned right-justified9-bit differential S S S S S S S S D D D D D D D D Sign-extended2's complement8-bit single-ended0 0 0 0 0 0 0 0 D D D D D D D D Unsigned right-justifiedNOTES: Sign bit or sign bit extension;D: Data, which is 2's complement data if indicatedAddress: 4003_B000h base + 10h offset + (4d × i), where i=0d to 1dBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0 DWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADCx_Rn field descriptionsField Description31–16ReservedThis field is reserved.This read-only field is reserved and always has the value 0.D Data resultChapter 23 Analog-to-Digital Converter (ADC)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 349
