SIM_SCGC6 field descriptions (continued)Field Description25TPM1TPM1 Clock Gate ControlControls the clock gate to the TPM1 module.0 Clock disabled1 Clock enabled24TPM0TPM0 Clock Gate ControlControls the clock gate to the TPM0 module.0 Clock disabled1 Clock enabled23PITPIT Clock Gate ControlThis bit controls the clock gate to the PIT module.0 Clock disabled1 Clock enabled22–19ReservedThis field is reserved.This read-only field is reserved and always has the value 0.18ReservedThis field is reserved.This read-only field is reserved and always has the value 0.17–16ReservedThis field is reserved.This read-only field is reserved and always has the value 0.15I2SI2S Clock Gate ControlThis bit controls the clock gate to the I2S module.0 Clock disabled1 Clock enabled14–2ReservedThis field is reserved.This read-only field is reserved and always has the value 0.1DMAMUXDMA Mux Clock Gate ControlControls the clock gate to the DMA Mux module.0 Clock disabled1 Clock enabled0FTFFlash Memory Clock Gate ControlControls the clock gate to the flash memory. Flash reads are still supported while the flash memory isclock gated, but entry into low power modes is blocked.0 Clock disabled1 Clock enabledChapter 12 System Integration Module (SIM)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 161