33.5.8 Error Interrupt Enable register (USBx_ERREN)Contains enable bits for each of the error interrupt sources within the USB module.Setting any of these bits enables the respective interrupt source in ERRSTAT. Each bit isset as soon as the error condition is detected. Therefore, the interrupt does not typicallycorrespond with the end of a token being processed. This register contains the value of0x00 after a reset.Address: 4007_2000h base + 8Ch offset = 4007_208ChBit 7 6 5 4 3 2 1 0Read BTSERREN 0 DMAERREN BTOERREN DFN8EN CRC16EN CRC5EOFEN PIDERRENWriteReset 0 0 0 0 0 0 0 0USBx_ERREN field descriptionsField Description7BTSERRENBTSERR Interrupt Enable0 Disables the BTSERR interrupt.1 Enables the BTSERR interrupt.6ReservedThis field is reserved.This read-only field is reserved and always has the value 0.5DMAERRENDMAERR Interrupt Enable0 Disables the DMAERR interrupt.1 Enables the DMAERR interrupt.4BTOERRENBTOERR Interrupt Enable0 Disables the BTOERR interrupt.1 Enables the BTOERR interrupt.3DFN8ENDFN8 Interrupt Enable0 Disables the DFN8 interrupt.1 Enables the DFN8 interrupt.2CRC16ENCRC16 Interrupt Enable0 Disables the CRC16 interrupt.1 Enables the CRC16 interrupt.1CRC5EOFENCRC5/EOF Interrupt Enable0 Disables the CRC5/EOF interrupt.1 Enables the CRC5/EOF interrupt.0PIDERRENPIDERR Interrupt Enable0 Disables the PIDERR interrupt.1 Enters the PIDERR interrupt.Memory map/Register definitionsKL27 Sub-Family Reference Manual , Rev. 5, 01/2016548 Freescale Semiconductor, Inc.
