ADCx_OFS field descriptionsField Description31–16ReservedThis field is reserved.This read-only field is reserved and always has the value 0.OFS Offset Error Correction Value23.4.9 ADC Plus-Side Gain Register (ADCx_PG)The Plus-Side Gain Register (PG) contains the gain error correction for the plus-sideinput in differential mode or the overall conversion in single-ended mode. PG, a 16-bitreal number in binary format, is the gain adjustment factor, with the radix point fixedbetween PG[15] and PG[14]. This register must be written by the user with the valuedescribed in the calibration procedure. Otherwise, the gain error specifications may notbe met.For more information regarding the calibration procedure, please refer to the Calibrationfunction section.Address: 4003_B000h base + 2Ch offset = 4003_B02ChBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0 PGWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0ADCx_PG field descriptionsField Description31–16ReservedThis field is reserved.This read-only field is reserved and always has the value 0.PG Plus-Side Gain23.4.10 ADC Minus-Side Gain Register (ADCx_MG)The Minus-Side Gain Register (MG) contains the gain error correction for the minus-sideinput in differential mode. This register is ignored in single-ended mode. MG, a 16-bitreal number in binary format, is the gain adjustment factor, with the radix point fixedbetween MG[15] and MG[14]. This register must be written by the user with the valuedescribed in the calibration procedure. Otherwise, the gain error specifications may notbe met.Chapter 23 Analog-to-Digital Converter (ADC)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 355
