LPTMRx_PSR field descriptionsField Description31–7ReservedThis field is reserved.This read-only field is reserved and always has the value 0.6–3PRESCALEPrescale ValueConfigures the size of the Prescaler in Time Counter mode or width of the glitch filter in Pulse Countermode. PRESCALE must be altered only when the LPTMR is disabled.0000 Prescaler divides the prescaler clock by 2; glitch filter does not support this configuration.0001 Prescaler divides the prescaler clock by 4; glitch filter recognizes change on input pin after 2 risingclock edges.0010 Prescaler divides the prescaler clock by 8; glitch filter recognizes change on input pin after 4 risingclock edges.0011 Prescaler divides the prescaler clock by 16; glitch filter recognizes change on input pin after 8rising clock edges.0100 Prescaler divides the prescaler clock by 32; glitch filter recognizes change on input pin after 16rising clock edges.0101 Prescaler divides the prescaler clock by 64; glitch filter recognizes change on input pin after 32rising clock edges.0110 Prescaler divides the prescaler clock by 128; glitch filter recognizes change on input pin after 64rising clock edges.0111 Prescaler divides the prescaler clock by 256; glitch filter recognizes change on input pin after 128rising clock edges.1000 Prescaler divides the prescaler clock by 512; glitch filter recognizes change on input pin after 256rising clock edges.1001 Prescaler divides the prescaler clock by 1024; glitch filter recognizes change on input pin after 512rising clock edges.1010 Prescaler divides the prescaler clock by 2048; glitch filter recognizes change on input pin after1024 rising clock edges.1011 Prescaler divides the prescaler clock by 4096; glitch filter recognizes change on input pin after2048 rising clock edges.1100 Prescaler divides the prescaler clock by 8192; glitch filter recognizes change on input pin after4096 rising clock edges.1101 Prescaler divides the prescaler clock by 16,384; glitch filter recognizes change on input pin after8192 rising clock edges.1110 Prescaler divides the prescaler clock by 32,768; glitch filter recognizes change on input pin after16,384 rising clock edges.1111 Prescaler divides the prescaler clock by 65,536; glitch filter recognizes change on input pin after32,768 rising clock edges.2PBYPPrescaler BypassWhen PBYP is set, the selected prescaler clock in Time Counter mode or selected input source in PulseCounter mode directly clocks the CNR. When PBYP is clear, the CNR is clocked by the output of theprescaler/glitch filter. PBYP must be altered only when the LPTMR is disabled.0 Prescaler/glitch filter is enabled.1 Prescaler/glitch filter is bypassed.PCS Prescaler Clock SelectSelects the clock to be used by the LPTMR prescaler/glitch filter. PCS must be altered only when theLPTMR is disabled. The clock connections vary by device.NOTE: See the chip configuration details for information on the connections to these inputs.Table continues on the next page...Memory map and register definitionKL27 Sub-Family Reference Manual , Rev. 5, 01/2016506 Freescale Semiconductor, Inc.
