33.5.7 Error Interrupt Status register (USBx_ERRSTAT)Contains enable bits for each of the error sources within the USB Module. Each of thesebits are qualified with their respective error enable bits. All bits of this register arelogically OR'd together and the result placed in the ERROR bit of the ISTAT register.After an interrupt bit has been set it may only be cleared by writing a one to therespective interrupt bit. Each bit is set as soon as the error condition is detected.Therefore, the interrupt does not typically correspond with the end of a token beingprocessed. This register contains the value of 0x00 after a reset.Address: 4007_2000h base + 88h offset = 4007_2088hBit 7 6 5 4 3 2 1 0Read BTSERR 0 DMAERR BTOERR DFN8 CRC16 CRC5 PIDERRWrite w1c w1c w1c w1c w1c w1c w1cReset 0 0 0 0 0 0 0 0USBx_ERRSTAT field descriptionsField Description7BTSERRThis bit is set when a bit stuff error is detected. If set, the corresponding packet is rejected due to the error.6ReservedThis field is reserved.This read-only field is reserved and always has the value 0.5DMAERRThis bit is set if the USB Module has requested a DMA access to read a new BDT but has not been giventhe bus before it needs to receive or transmit data. If processing a TX transfer this would cause a transmitdata underflow condition. If processing a RX transfer this would cause a receive data overflow condition.This interrupt is useful when developing device arbitration hardware for the microprocessor and the USBmodule to minimize bus request and bus grant latency. This bit is also set if a data packet to or from thehost is larger than the buffer size allocated in the BDT. In this case the data packet is truncated as it is putin buffer memory.4BTOERRThis bit is set when a bus turnaround timeout error occurs. The USB module contains a bus turnaroundtimer that keeps track of the amount of time elapsed between the token and data phases of a SETUP orOUT TOKEN or the data and handshake phases of a IN TOKEN. If more than 16 bit times are countedfrom the previous EOP before a transition from IDLE, a bus turnaround timeout error occurs.3DFN8This bit is set if the data field received was not 8 bits in length. USB Specification 1.0 requires that datafields be an integral number of bytes. If the data field was not an integral number of bytes, this bit is set.2CRC16This bit is set when a data packet is rejected due to a CRC16 error.1CRC5This error interrupt has two functions. When the USB Module is operating in peripheral mode(HOSTMODEEN=0), this interrupt detects CRC5 errors in the token packets generated by the host. If setthe token packet was rejected due to a CRC5 error.0PIDERRThis bit is set when the PID check field fails.Chapter 33 Universal Serial Bus (USB) FS SubsystemKL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 547
