LPUARTx_STAT field descriptions (continued)Field DescriptionReserved This field is reserved.This read-only field is reserved and always has the value 0.37.3.3 LPUART Control Register (LPUARTx_CTRL)This read/write register controls various optional features of the LPUART system. Thisregister should only be altered when the transmitter and receiver are both disabled.Address: Base address + 8h offsetBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16RR8T9 R9T8TXDIRTXINVORIE NEIE FEIE PEIE TIE TCIE RIE ILIE TE RE RWU SBKWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0RMA1IEMA2IE 0IDLECFGLOOPSDOZEENRSRC MWAKEILT PE PTWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LPUARTx_CTRL field descriptionsField Description31R8T9Receive Bit 8 / Transmit Bit 9R8 is the ninth data bit received when the LPUART is configured for 9-bit or 10-bit data formats. Whenreading 9-bit or 10-bit data, read R8 before reading LPUART_DATA.T9 is the tenth data bit received when the LPUART is configured for 10-bit data formats. When writing 10-bit data, write T9 before writing LPUART_DATA. If T9 does not need to change from its previous value,such as when it is used to generate address mark or parity, they it need not be written each timeLPUART_DATA is written.30R9T8Receive Bit 9 / Transmit Bit 8R9 is the tenth data bit received when the LPUART is configured for 10-bit data formats. When reading10-bit data, read R9 before reading LPUART_DATAT8 is the ninth data bit received when the LPUART is configured for 9-bit or 10-bit data formats. Whenwriting 9-bit or 10-bit data, write T8 before writing LPUART_DATA. If T8 does not need to change from itsprevious value, such as when it is used to generate address mark or parity, they it need not be writteneach time LPUART_DATA is written.Table continues on the next page...Register definitionKL27 Sub-Family Reference Manual , Rev. 5, 01/2016658 Freescale Semiconductor, Inc.
