Address: 4003_7000h base + E4h offset = 4003_70E4hBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R LTLWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PIT_LTMR64L field descriptionsField DescriptionLTL Life Timer valueShows the value of timer 0 at the time LTMR64H was last read. It will only update if LTMR64H is read.30.4.4 Timer Load Value Register (PIT_LDVALn)These registers select the timeout period for the timer interrupts.Access: User read/writeAddress: 4003_7000h base + 100h offset + (16d × i), where i=0d to 1dBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R TSVWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PIT_LDVALn field descriptionsField DescriptionTSV Timer Start ValueSets the timer start value. The timer will count down until it reaches 0, then it will generate an interrupt andload this register value again. Writing a new value to this register will not restart the timer; instead thevalue will be loaded after the timer expires. To abort the current cycle and start a timer period with the newvalue, the timer must be disabled and enabled again.30.4.5 Current Timer Value Register (PIT_CVALn)These registers indicate the current timer position.Access: User read onlyAddress: 4003_7000h base + 104h offset + (16d × i), where i=0d to 1dBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R TVLWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Memory map/register descriptionKL27 Sub-Family Reference Manual , Rev. 5, 01/2016492 Freescale Semiconductor, Inc.
