38.4.5 UART Status Register 1 (UARTx_S1)The S1 register provides inputs to the MCU for generation of UART interrupts or DMArequests. This register can also be polled by the MCU to check the status of its fields. Toclear a flag, the status register should be read followed by a read or write to D register,depending on the interrupt flag type. Other instructions can be executed between the twosteps as long the handling of I/O is not compromised, but the order of operations isimportant for flag clearing. When a flag is configured to trigger a DMA request, assertionof the associated DMA done signal from the DMA controller clears the flag.NOTE• If the condition that results in the assertion of the flag,interrupt, or DMA request is not resolved prior to clearingthe flag, the flag, and interrupt/DMA request, reasserts.Address: 4006_C000h base + 4h offset = 4006_C004hBit 7 6 5 4 3 2 1 0Read TDRE TC RDRF IDLE OR NF FE PFWriteReset 1 1 0 0 0 0 0 0UARTx_S1 field descriptionsField Description7TDRETransmit Data Register Empty FlagTDRE will set when the transmit data register (D) is empty. To clear TDRE, read S1 when TDRE is setand then write to the UART data register (D).0 Transmit data buffer is full.1 Transmit data buffer is empty.6TCTransmit Complete FlagTC is set when the transmit buffer is empty and no data, preamble, or break character is beingtransmitted. When TC is set, the transmit data output signal becomes idle (logic 1). TC is cleared byreading S1 with TC set and then doing one of the following: When C7816[ISO_7816E] is set/enabled, thisfield is set after any NACK signal has been received, but prior to any corresponding guard times expiring.• Writing to D to transmit new data.• Queuing a preamble by clearing and then setting C2[TE].• Queuing a break character by writing 1 to SBK in C2.0 Transmitter active (sending data, a preamble, or a break).1 Transmitter idle (transmission activity complete).5RDRFReceive Data Register Full FlagRDRF is set when the receive buffer (D) is full. To clear RDRF, read S1 when RDRF is set and then readD.Table continues on the next page...Chapter 38 Universal Asynchronous Receiver/Transmitter(UART)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 687
