38.4.10 UART Match Address Registers 2 (UARTx_MA2)These registers can be read and written at anytime. The MA1 and MA2 registers arecompared to input data addresses when the most significant bit is set and the associatedC4[MAEN] field is set. If a match occurs, the following data is transferred to the dataregister. If a match fails, the following data is discarded.Address: 4006_C000h base + 9h offset = 4006_C009hBit 7 6 5 4 3 2 1 0Read MAWriteReset 0 0 0 0 0 0 0 0UARTx_MA2 field descriptionsField DescriptionMA Match Address38.4.11 UART Control Register 4 (UARTx_C4)Address: 4006_C000h base + Ah offset = 4006_C00AhBit 7 6 5 4 3 2 1 0Read MAEN1 MAEN2 M10 BRFAWriteReset 0 0 0 0 0 0 0 0UARTx_C4 field descriptionsField Description7MAEN1Match Address Mode Enable 1See Match address operation for more information.0 All data received is transferred to the data buffer if MAEN2 is cleared.1 All data received with the most significant bit cleared, is discarded. All data received with the mostsignificant bit set, is compared with contents of MA1 register. If no match occurs, the data isdiscarded. If match occurs, data is transferred to the data buffer. This field must be cleared whenC7816[ISO7816E] is set/enabled.6MAEN2Match Address Mode Enable 2See Match address operation for more information.0 All data received is transferred to the data buffer if MAEN1 is cleared.1 All data received with the most significant bit cleared, is discarded. All data received with the mostsignificant bit set, is compared with contents of MA2 register. If no match occurs, the data isdiscarded. If a match occurs, data is transferred to the data buffer. This field must be cleared whenC7816[ISO7816E] is set/enabled.Table continues on the next page...Memory map and registersKL27 Sub-Family Reference Manual , Rev. 5, 01/2016694 Freescale Semiconductor, Inc.
