NOTEThis register is reset on Chip Reset not VLLS and by resettypes that trigger Chip Reset not VLLS. It is unaffected by resettypes that do not trigger Chip Reset not VLLS. See theIntroduction details for more information.Address: 4007_C000h base + 7h offset = 4007_C007hBit 7 6 5 4 3 2 1 0Read MWUF7 MWUF6 MWUF5 MWUF4 MWUF3 MWUF2 MWUF1 MWUF0WriteReset 0 0 0 0 0 0 0 0LLWU_F3 field descriptionsField Description7MWUF7Wakeup flag For module 7Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clearthe flag, follow the internal peripheral flag clearing mechanism.0 Module 7 input was not a wakeup source1 Module 7 input was a wakeup source6MWUF6Wakeup flag For module 6Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clearthe flag, follow the internal peripheral flag clearing mechanism.0 Module 6 input was not a wakeup source1 Module 6 input was a wakeup source5MWUF5Wakeup flag For module 5Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clearthe flag, follow the internal peripheral flag clearing mechanism.0 Module 5 input was not a wakeup source1 Module 5 input was a wakeup source4MWUF4Wakeup flag For module 4Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clearthe flag, follow the internal peripheral flag clearing mechanism.0 Module 4 input was not a wakeup source1 Module 4 input was a wakeup source3MWUF3Wakeup flag For module 3Indicates that an enabled internal peripheral was a source of exiting a low-leakage power mode. To clearthe flag, follow the internal peripheral flag clearing mechanism.0 Module 3 input was not a wakeup source1 Module 3 input was a wakeup source2MWUF2Wakeup flag For module 2Table continues on the next page...Memory map/register definitionKL27 Sub-Family Reference Manual , Rev. 5, 01/2016278 Freescale Semiconductor, Inc.
