Address: 4002_0000h base + 0h offset = 4002_0000hBit 7 6 5 4 3 2 1 0Read CCIF RDCOLERR ACCERR FPVIOL 0 MGSTAT0Write w1c w1c w1c w1cReset 0 0 0 0 0 0 0 0FTFA_FSTAT field descriptionsField Description7CCIFCommand Complete Interrupt FlagIndicates that a flash command has completed. The CCIF flag is cleared by writing a 1 to CCIF to launch acommand, and CCIF stays low until command completion or command violation.CCIF is reset to 0 but is set to 1 by the memory controller at the end of the reset initialization sequence.Depending on how quickly the read occurs after reset release, the user may or may not see the 0hardware reset value.0 Flash command in progress1 Flash command has completed6RDCOLERRFlash Read Collision Error FlagIndicates that the MCU attempted a read from a flash memory resource that was being manipulated by aflash command (CCIF=0). Any simultaneous access is detected as a collision error by the block arbitrationlogic. The read data in this case cannot be guaranteed. The RDCOLERR bit is cleared by writing a 1 to it.Writing a 0 to RDCOLERR has no effect.0 No collision error detected1 Collision error detected5ACCERRFlash Access Error FlagIndicates an illegal access has occurred to a flash memory resource caused by a violation of thecommand write sequence or issuing an illegal flash command. While ACCERR is set, the CCIF flagcannot be cleared to launch a command. The ACCERR bit is cleared by writing a 1 to ACCERR whileCCIF is set. Writing a 0 to the ACCERR bit has no effect.0 No access error detected1 Access error detected4FPVIOLFlash Protection Violation FlagIndicates an attempt was made to program or erase an address in a protected area of program flashmemory during a command write sequence . While FPVIOL is set, the CCIF flag cannot be cleared tolaunch a command. The FPVIOL bit is cleared by writing a 1 to FPVIOL while CCIF is set. Writing a 0 tothe FPVIOL bit has no effect.0 No protection violation detected1 Protection violation detected3–1ReservedThis field is reserved.This read-only field is reserved and always has the value 0.0MGSTAT0Memory Controller Command Completion Status FlagThe MGSTAT0 status flag is set if an error is detected during execution of a flash command or during theflash reset sequence. As a status flag, this field cannot (and need not) be cleared by the user like the othererror flags in this register.Table continues on the next page...Memory Map and RegistersKL27 Sub-Family Reference Manual , Rev. 5, 01/2016894 Freescale Semiconductor, Inc.
