Two interrupt enable bits, TNEARIEN and RNFULLIEN, provide CPU interrupts basedon the "watermark" feature of the TNEARF and RNFULLF flags of the S register.Address: Base address + Bh offsetBit 7 6 5 4 3 2 1 0Read 0 TNEAREF_MARKRNFULLF_MARK INTCLR TNEARIEN RNFULLIEN FIFOMODEWriteReset 0 0 0 0 0 0 0 0SPIx_C3 field descriptionsField Description7–6ReservedThis field is reserved.This read-only field is reserved and always has the value 0.5TNEAREF_MARKTransmit FIFO nearly empty watermarkThis bit selects the mark after which the TNEAREF flag is asserted.0 TNEAREF is set when the transmit FIFO has 16 bits or less1 TNEAREF is set when the transmit FIFO has 32 bits or less4RNFULLF_MARKReceive FIFO nearly full watermarkThis bit selects the mark after which the RNFULLF flag is asserted.0 RNFULLF is set when the receive FIFO has 48 bits or more1 RNFULLF is set when the receive FIFO has 32 bits or more3INTCLRInterrupt clearing mechanism selectThis bit selects the mechanism by which the SPRF, SPTEF, TNEAREF, and RNFULLF interrupts arecleared.0 These interrupts are cleared when the corresponding flags are cleared depending on the state of theFIFOs1 These interrupts are cleared by writing the corresponding bits in the CI register2TNEARIENTransmit FIFO nearly empty interrupt enableWriting 1 to this bit enables the SPI to interrupt the CPU when the TNEAREF flag is set. This bit is ignoredand has no function if the FIFOMODE bit is 0.0 No interrupt upon TNEAREF being set1 Enable interrupts upon TNEAREF being set1RNFULLIENReceive FIFO nearly full interrupt enableWriting 1 to this bit enables the SPI to interrupt the CPU when the RNFULLF flag is set. This bit is ignoredand has no function if the FIFOMODE bit is 0.0 No interrupt upon RNFULLF being set1 Enable interrupts upon RNFULLF being set0FIFOMODEFIFO mode enableThis bit enables the SPI to use a 64-bit FIFO (8 bytes or four 16-bit words) for both transmit and receivebuffers.0 FIFO mode disabled1 FIFO mode enabledChapter 35 Serial Peripheral Interface (SPI)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 587
