DACx_DATnH field descriptions (continued)Field DescriptionWhen the DAC Buffer is not enabled, DATA[11:0] controls the output voltage based on the followingformula. V out = V in * (1 + DACDAT0[11:0])/4096When the DAC buffer is enabled, DATA[11:0] is mapped to the 16-word buffer.25.4.3 DAC Status Register (DACx_SR)If DMA is enabled, the flags can be cleared automatically by DMA when the DMArequest is done. Writing 0 to a field clears it whereas writing 1 has no effect. After reset,DACBFRPTF is set and can be cleared by software, if needed. The flags are set onlywhen the data buffer status is changed.Address: 4003_F000h base + 20h offset = 4003_F020hBit 7 6 5 4 3 2 1 0Read 0 0 DACBFRPTFDACBFRPBFWriteReset 0 0 0 0 0 0 1 0DACx_SR field descriptionsField Description7–3ReservedThis field is reserved.This read-only field is reserved and always has the value 0.2ReservedThis field is reserved.This read-only field is reserved and always has the value 0.1DACBFRPTFDAC Buffer Read Pointer Top Position FlagIn FIFO mode, it is FIFO nearly empty flag. It is set when only one data remains in FIFO. Any DAC triggerdoes not increase the Read Pointer if this bit is set to avoid any possible glitch or abrupt change at DACoutput. It is cleared automatically if FIFO is not empty.0 The DAC buffer read pointer is not zero.1 The DAC buffer read pointer is zero.0DACBFRPBFDAC Buffer Read Pointer Bottom Position FlagIn FIFO mode, it is FIFO FULL status bit. It means FIFO read pointer equals Write Pointer because ofWrite Pointer increase. If this bit is set, any write to FIFO from either DMA or CPU is ignored by DAC. It iscleared if there is any DAC trigger making the DAC read pointer increase. Write to this bit is ignored inFIFO mode.0 The DAC buffer read pointer is not equal to C2[DACBFUP].1 The DAC buffer read pointer is equal to C2[DACBFUP].Memory map/register definitionKL27 Sub-Family Reference Manual , Rev. 5, 01/2016416 Freescale Semiconductor, Inc.
