Section number Title Page40.5 Functional description...................................................................................................................................................81240.5.1 SAI clocking.................................................................................................................................................. 81240.5.2 SAI resets....................................................................................................................................................... 81440.5.3 Synchronous modes....................................................................................................................................... 81540.5.4 Frame sync configuration...............................................................................................................................81540.5.5 Data FIFO...................................................................................................................................................... 81640.5.6 Word mask register........................................................................................................................................ 81940.5.7 Interrupts and DMA requests......................................................................................................................... 819Chapter 41General-Purpose Input/Output (GPIO)41.1 Chip-specific GPIO information...................................................................................................................................82141.1.1 GPIO instantiation information......................................................................................................................82141.1.2 GPIO accessibility in the memory map......................................................................................................... 82141.2 Introduction...................................................................................................................................................................82241.2.1 Features.......................................................................................................................................................... 82241.2.2 Modes of operation........................................................................................................................................ 82241.2.3 GPIO signal descriptions............................................................................................................................... 82241.3 Memory map and register definition.............................................................................................................................82441.3.1 Port Data Output Register (GPIOx_PDOR)...................................................................................................82541.3.2 Port Set Output Register (GPIOx_PSOR)......................................................................................................82641.3.3 Port Clear Output Register (GPIOx_PCOR)..................................................................................................82641.3.4 Port Toggle Output Register (GPIOx_PTOR)............................................................................................... 82741.3.5 Port Data Input Register (GPIOx_PDIR).......................................................................................................82741.3.6 Port Data Direction Register (GPIOx_PDDR)...............................................................................................82841.4 Functional description...................................................................................................................................................82841.4.1 General-purpose input....................................................................................................................................82841.4.2 General-purpose output..................................................................................................................................828Chapter 42Bit Manipulation Engine (BME)KL27 Sub-Family Reference Manual , Rev. 5, 01/201634 Freescale Semiconductor, Inc.
