43.3.2.2 MTB_DWT Comparator Register (MTBDWT_COMPn)The MTBDWT_COMPn registers provide the reference value for comparator n.Address: F000_1000h base + 20h offset + (16d × i), where i=0d to 1dBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R COMPWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MTBDWT_COMPn field descriptionsField DescriptionCOMP Reference value for comparisonIf MTBDWT_COMP0 is used for a data value comparator and the access size is byte or halfword, the datavalue must be replicated across all appropriate byte lanes of this register. For example, if the data is abyte-sized "x" value, then COMP[31:24] = COMP[23:16] = COMP[15:8] = COMP[7:0] = "x". Likewise, if thedata is a halfword-size "y" value, then COMP[31:16] = COMP[15:0] = "y".43.3.2.3 MTB_DWT Comparator Mask Register (MTBDWT_MASKn)The MTBDWT_MASKn registers define the size of the ignore mask applied to thereference address for address range matching by comparator n. Note the format of thismask field is different than the MTB_MASTER[MASK].Address: F000_1000h base + 24h offset + (16d × i), where i=0d to 1dBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0 MASKWReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MTBDWT_MASKn field descriptionsField Description31–5ReservedThis field is reserved.This read-only field is reserved and always has the value 0.MASK MASKThe value of the ignore mask, 0-31 bits, is applied to address range matching. MASK = 0 is used toinclude all bits of the address in the comparison, except if MASK = 0 and the comparator is configured towatch instruction fetch addresses, address bit [0] is ignored by the hardware since all fetches must be atleast halfword aligned. For MASK != 0 and regardless of watch type, address bits [x-1:0] are ignored in theaddress comparison.Using a mask means the comparator matches on a range of addresses, defined by the unmasked mostsignificant bits of the address, bits [31:x]. The maximum MASK value is 24, producing a 16 Mbyte mask.An attempted write of a MASK value > 24 is limited by the MTBDWT hardware to 24.Table continues on the next page...Chapter 43 Micro Trace Buffer (MTB)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 871
