I2Sx_TCR4 field descriptions (continued)Field DescriptionWhen set, and the frame sync is generated internally, a frame sync is only generated when the FIFOwarning flag is clear.0 Internal frame sync is generated continuously.1 Internal frame sync is generated when the FIFO warning flag is clear.1FSPFrame Sync PolarityConfigures the polarity of the frame sync.0 Frame sync is active high.1 Frame sync is active low.0FSDFrame Sync DirectionConfigures the direction of the frame sync.0 Frame sync is generated externally in Slave mode.1 Frame sync is generated internally in Master mode.40.4.5 SAI Transmit Configuration 5 Register (I2Sx_TCR5)This register must not be altered when TCSR[TE] is set.Address: 4002_F000h base + 14h offset = 4002_F014hBit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R 0 WNW 0 W0W 0 FBT 0WReset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0I2Sx_TCR5 field descriptionsField Description31–29ReservedThis field is reserved.This read-only field is reserved and always has the value 0.28–24WNWWord N WidthConfigures the number of bits in each word, for each word except the first in the frame. The value writtenmust be one less than the number of bits per word. Word width of less than 8 bits is not supported.23–21ReservedThis field is reserved.This read-only field is reserved and always has the value 0.20–16W0WWord 0 WidthConfigures the number of bits in the first word in each frame. The value written must be one less than thenumber of bits in the first word. Word width of less than 8 bits is not supported if there is only one word perframe.15–13ReservedThis field is reserved.This read-only field is reserved and always has the value 0.Table continues on the next page...Chapter 40 Synchronous Audio Interface (SAI)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 799
