38.5.4.2 Nine-bit configurationWhen C1[M] is set and C4[M10] is cleared, the UART is configured for 9-bit datacharacters. If C1[PE] is enabled, the ninth bit is either C3[T8/R8] or the internallygenerated parity bit. This results in a frame consisting of a total of 11 bits. In the eventthat the ninth data bit is selected to be C3[T8], it will remain unchanged aftertransmission and can be used repeatedly without rewriting it, unless the value needs to bechanged. This feature may be useful when the ninth data bit is being used as an addressmark.When C1[M] and C4[M10] are set, the UART is configured for 9-bit data characters, butthe frame consists of a total of 12 bits. The 12 bits include the start and stop bits, the 9data character bits, and a tenth internal data bit. Note that if C4[M10] is set, C1[PE] mustalso be set. In this case, the tenth bit is the internally generated parity bit. The ninth bitcan either be used as an address mark or a ninth data bit.See the following table.Table 38-11. Configuration of 9-bit data formatsC1[PE] UC1[M] C1[M10] StartbitDatabitsAddressbitsParitybitsStopbit0 0 0 See Eight-bit configuration0 0 1 Invalid configuration0 1 0 1 9 0 0 10 1 0 1 8 1 1 0 10 1 1 Invalid Configuration1 0 0 See Eight-bit configuration1 0 1 Invalid Configuration1 1 0 1 8 0 1 11 1 1 1 9 0 1 11 1 1 1 8 11 1 11. The address bit identifies the frame as an address character.NoteUnless in 9-bit mode with M10 set, do not use address markwakeup with parity enabled.38.5.4.3 Timing examplesTiming examples of these configurations in the NRZ mark/space data format areillustrated in the following figures. The timing examples show all of the configurations inthe following sub-sections along with the LSB and MSB first variations.Chapter 38 Universal Asynchronous Receiver/Transmitter(UART)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 727
