SAMPLESRx pin inputRT CLOCKRT CLOCK COUNTRESET RT CLOCK1 1 1 1 0 0START BIT LSBRT1RT1RT1RT1RT1RT1RT1RT1RT1RT1RT2RT3RT1RT1RT1RT1RT1RT1RT1RT1RT1NO START BIT FOUND1 1 1 1 1 1 1 0 0 0 0 0 0 0 0RT4RT5RT6RT7RT1RT1RT1Figure 38-8. Start bit search example 5 (C7816[ISO_7816E] = 0)In the following figure, a noise burst makes the majority of data samples RT8, RT9, andRT10 high. In this example C7816[ISO_7816E] = 0. This sets the noise flag but does notreset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are ignored.In this example, if C7816[ISO_7816E] = 1 then a start bit would not have been detectedat all since at least two of the three samples (RT8, RT9, RT10) were high.SAMPLESRx pin inputRT CLOCKRT CLOCK COUNTRESET RT CLOCK1 1 1 1 0 0START BIT LSBRT1RT1RT1RT1RT1RT1RT1RT1RT1RT1RT2RT3RT10RT1RT2RT31 1 1 1 1 0 0 1 0 1RT4RT5RT6RT7RT8RT9RT11RT12RT13RT14RT15RT16Figure 38-9. Start bit search example 638.5.2.5 Framing errorsIf the data recovery logic does not detect a logic 1 where the stop bit should be in anincoming frame, it sets the framing error flag, S1[FE]. A break character also sets theS1[FE] because a break character has no stop bit. S1[FE] is set at the same time thatreceived data is placed in the receive data buffer. Framing errors are not supported whenC7816[ISO7816E] is set/enabled. However, if S1[FE] is set, data will not be receivedwhen C7816[ISO7816E] is set.Chapter 38 Universal Asynchronous Receiver/Transmitter(UART)KL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 719
