Appendix ARelease Notes for Revision 5A.1 General changes throughout• Corrected Flash memory information in Chapter - 4.• Updated status of COP Watchdog from static to functional under Stop and VLPS modes in Table 7-2. Moduleoperation in low power modes. Also added 12-bit DAC description.• Added a note to the section 11.2, "Port control and interrupt summary".• Removed the following information: "The LK bit (bit 15 of Pin Control Register PCRn) locks the lower 16 bits of eachPin Control register and blocks any writes to that register until the next system reset."• Added "COP watchdog operation" section to the System Integration Module (SIM) chapter.• Added chip-specific section (detailing about peripheral pinmux specification) to the Kinetis ROM Bootloader chapter.• Added ReadMemory command in Table 13-2. Commands supported by the Kinetis Bootloader in ROM.• Updated descriptions of the following configuration fields: enabledPeripherals, i2cSlaveAddress,peripheralDetectionTimeout, clockDivider in Table 13-3. Configuration Fields for the Kinetis Bootloader.• Corrected Oscillator frequency range from 1–8 MHz to 3–8 MHz.• Added chip-specific SPI information clarifying the differences and instantiation details of the SPI peripheral.• Added chip-specific FlexIO information to Flexible I/O (FlexIO) chapter.• Removed support of BME accessing RAM from Bit Manipulation Engine (BME) chapter.A.2 About This Document chapter changesNo substantial content changesA.3 Introduction chapter changesNo substantial content changesA.4 Core Overview chapter changesNo substantial content changesKL27 Sub-Family Reference Manual , Rev. 5, 01/2016Freescale Semiconductor, Inc. 931
