Table 45-10. Program Check Command FCCOB RequirementsFCCOB Number FCCOB Contents [7:0]0 0x02 (PGMCHK)1 Flash address [23:16]2 Flash address [15:8]3 Flash address [7:0]14 Margin Choice8 Byte 0 expected data9 Byte 1 expected dataA Byte 2 expected dataB Byte 3 expected data1. Must be longword aligned (Flash address [1:0] = 00).Upon clearing CCIF to launch the Program Check command, the flash memory modulesets the read margin for 1s according to Table 45-11, reads the specified longword, andcompares the actual read data to the expected data provided by the FCCOB. If thecomparison at margin-1 fails, FSTAT[MGSTAT0] is set.The flash memory module then sets the read margin for 0s, re-reads, and compares again.If the comparison at margin-0 fails, FSTAT[MGSTAT0] is set. FSTAT[CCIF] is set afterthe Program Check operation completes.The supplied address must be longword aligned (the lowest two bits of the byte addressmust be 00):• Byte 3 data is written to the supplied byte address ('start'),• Byte 2 data is programmed to byte address start+0b01,• Byte 1 data is programmed to byte address start+0b10,• Byte 0 data is programmed to byte address start+0b11.NOTESee the description of margin reads, Margin Read CommandsTable 45-11. Margin Level Choices for Program CheckRead Margin Choice Margin Level Description0x01 Read at 'User' margin-1 and 'User' margin-00x02 Read at 'Factory' margin-1 and 'Factory' margin-0Table 45-12. Program Check Command Error HandlingError Condition Error BitCommand not available in current mode/security FSTAT[ACCERR]An invalid flash address is supplied FSTAT[ACCERR]Table continues on the next page...Functional DescriptionKL27 Sub-Family Reference Manual , Rev. 5, 01/2016914 Freescale Semiconductor, Inc.
