NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 1016 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 1016 of 1269NXP Semiconductors UM10503Chapter 39: LPC43xx SSP0/1latches each bit on the rising edge of SK. At the end of the frame, for single transfers, theCS signal is pulled HIGH one clock period after the last bit has been latched in the receiveserial shifter, that causes the data to be transferred to the receive FIFO.Note: The off-chip slave device can tristate the receive line either on the falling edge ofSK after the LSB has been latched by the receive shiftier, or when the CS pin goes HIGH.For continuous transfers, data transmission begins and ends in the same manner as asingle transfer. However, the CS line is continuously asserted (held LOW) andtransmission of data occurs back to back. The control byte of the next frame followsdirectly after the LSB of the received data from the current frame. Each of the receivedvalues is transferred from the receive shifter on the falling edge SK, after the LSB of theframe has been latched into the SSP.39.7.3.1 Setup and hold time requirements on CS with respect to SK in MicrowiremodeIn the Microwire mode, the SSP slave samples the first bit of receive data on the risingedge of SK after CS has gone LOW. Masters that drive a free-running SK must ensurethat the CS signal has sufficient setup and hold margins with respect to the rising edge ofSK.Figure 129 illustrates these setup and hold time requirements. With respect to the SKrising edge on which the first bit of receive data is to be sampled by the SSP slave, CSmust have a setup of at least two times the period of SK on which the SSP operates. Withrespect to the SK rising edge previous to this edge, CS must have a hold of at least oneSK period.Fig 128. Microwire frame format (continuous transfers)SKCSSOSIMSB LSB4 to 16 bitsoutput data8-bit control4 to 16 bitsoutput dataMSB LSB0 MSB LSBLSBFig 129. Microwire frame format setup and hold detailsSKCSSIt HOLD= tSKtSETUP=2*tSK