UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 413 of 1269NXP Semiconductors UM10503Chapter 19: LPC43xx General Purpose DMA (GPDMA) controller• Source and destination burst sizes, 16 transfers.• Next LLI address, 0x2000 0020.A chain of descriptors is built up, each one pointing to the next in the series. To initializethe DMA stream, the first LLI, 0x2000 0000, is programmed into the DMA Controller.When the first packet of data has been transferred the next LLI is automatically loaded.The final LLI is stored at 0x2000 0070 and contains:• Source start address 0x2000 1200.• Destination address set to the destination peripheral address.• Transfer width, word (32-bit).• Transfer size, 3072 bytes (0xC00).• Source and destination burst sizes, 16 transfers.• Next LLI address, 0x0.Because the next LLI address is set to zero, this is the last descriptor, and the DMAchannel is disabled after transferring the last item of data. The channel is probably set togenerate an interrupt at this point to indicate to the ARM processor that the channel canbe reprogrammed.