UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 272 of 1269NXP Semiconductors UM10503Chapter 14: LPC43xx Pin configurationPE_15 E13 - - [3] N;PU- R — Function reserved.O CTOUT_0 — SCT output 0. Match output 0 of timer 0.I/O I2C1_SCL — I 2C1 clock input/output (this pin does not use aspecialized I2C pad).O EMC_CKEOUT3 — SDRAM clock enable 3.I/O GPIO7[15] — General purpose digital input/output pin.- R — Function reserved.- R — Function reserved.- R — Function reserved.PF_0 D12 - 159 [3] O;PUI/O SSP0_SCK — Serial clock for SSP0.I GP_CLKIN — General purpose clock input to the CGU.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.O I2S1_TX_MCLK — I2S1 transmit master clock.PF_1 E11 - - [3] N;PU- R — Function reserved.- R — Function reserved.I/O SSP0_SSEL — Slave Select for SSP0.- R — Function reserved.I/O GPIO7[16] — General purpose digital input/output pin.- R — Function reserved.I/O SGPIO0 — General purpose digital input/output pin.- R — Function reserved.PF_2 D11 - 168 [3] N;PU- R — Function reserved.O U3_TXD — Transmitter output for USART3.I/O SSP0_MISO — Master In Slave Out for SSP0.- R — Function reserved.I/O GPIO7[17] — General purpose digital input/output pin.- R — Function reserved.I/O SGPIO1 — General purpose digital input/output pin.- R — Function reserved.Table 130. LPC4357/53 Pin description …continuedPin nameLBGA256TFBGA180LQFP208Reset state[2]TypeDescription