UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 1116 of 1269NXP Semiconductors UM10503Chapter 43: LPC43xx I2C-bus interface43.7.5 I2C SCL HIGH and LOW duty cycle registers43.7.5.1 Selecting the appropriate I2 C data rate and duty cycleSoftware must set values for the registers SCLH and SCLL to select the appropriate datarate and duty cycle. SCLH defines the number of C_PCLK cycles for the SCL HIGH time,SCLL defines the number of I2C_PCLK cycles for the SCL low time. The frequency isdetermined by the following formula (I2C_PCLK is the frequency of the peripheral I2Cclock):(9)The values for SCLL and SCLH must ensure that the data rate is in the appropriate I 2Cdata rate range. Each register value must be greater than or equal to 4. Table 988 givessome examples of I2C-bus rates based on I2C_PCLK frequency and SCLL and SCLHvalues.SCLL and SCLH values should not necessarily be the same. Software can set differentduty cycles on SCL by setting these two registers. For example, the I 2C-bus specificationdefines the SCL low time and high time at different values for a Fast-mode and Fast-modePlus I 2 C.Table 986. I2 C SCL HIGH Duty Cycle register (SCLH - address 0x400A 1010 (I2C0) and0x400E 0010 (I2C1)) bit descriptionBit Symbol Description Reset value15:0 SCLH Count for SCL HIGH time period selection. 0x000431:16 - Reserved. The value read from a reserved bit is not defined. -Table 987. I2 C SCL Low duty cycle register (SCLL - address 0x400A 1014 (I2C0) and0x400E 0014 (I2C1)) bit descriptionBit Symbol Description Reset value15:0 SCLL Count for SCL low time period selection. 0x000431:16 - Reserved. The value read from a reserved bit is not defined. -Table 988. SCLL + SCLH values for selected I2C clock valuesI 2C mode I 2 C bitfrequencyI2C_PCLK (MHz)6 8 10 12 16 20 30 40 50SCLH + SCLLStandard mode 100 kHz 60 80 100 120 160 200 300 400 500Fast-mode 400 kHz 15 20 25 30 40 50 75 100 125Fast-mode Plus 1 MHz - 8 10 12 16 20 30 40 50I2C bitfrequencyI2CPCLKI2CSCLH I2CSCLL+---------------------------------------------------------=