UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 244 of 1269NXP Semiconductors UM10503Chapter 14: LPC43xx Pin configurationP4_4 B1 A1 14 [6] N;PUI/O GPIO2[4] — General purpose digital input/output pin.O CTOUT_2 — SCT output 2. Match output 2 of timer 0.O LCD_VD1 — LCD data.- R — Function reserved.- R — Function reserved.O LCD_VD20 — LCD data.I/O U3_DIR — RS-485/EIA-485 output enable/direction control forUSART3.I/O SGPIO10 — General purpose digital input/output pin.O DAC — DAC output. Configure the pin as GPIO input and use theanalog function select register in the SCU to select the DAC.P4_5 D2 C2 15 [3] N;PUI/O GPIO2[5] — General purpose digital input/output pin.O CTOUT_5 — SCT output 5. Match output 3 of timer 3.O LCD_FP — Frame pulse (STN). Vertical synchronization pulse(TFT).- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.I/O SGPIO11 — General purpose digital input/output pin.P4_6 C1 B1 17 [3] N;PUI/O GPIO2[6] — General purpose digital input/output pin.O CTOUT_4 — SCT output 4. Match output 3 of timer 3.O LCD_ENAB/LCDM — STN AC bias drive or TFT data enable input.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.I/O SGPIO12 — General purpose digital input/output pin.P4_7 H4 F4 21 [3] O;PUO LCD_DCLK — LCD panel clock.I GP_CLKIN — General purpose clock input to the CGU.- R — Function reserved.- R — Function reserved.- R — Function reserved.- R — Function reserved.I/O I2S1_TX_SCK — Transmit Clock. It is driven by the master andreceived by the slave. Corresponds to the signal SCK in the I 2S-busspecification.I/O I2S0_TX_SCK — Transmit Clock. It is driven by the master andreceived by the slave. Corresponds to the signal SCK in the I 2S-busspecification.Table 130. LPC4357/53 Pin description …continuedPin nameLBGA256TFBGA180LQFP208Reset state[2]TypeDescription