NXP Semiconductors LPC43 Series User Manual

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NXP Semiconductors LPC43 Series User Manual Manual pdf 619 page image

UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 619 of 1269NXP Semiconductors UM10503Chapter 24: LPC43xx USB1 Host/Device controller24.6.16 USB Mode register (USBMODE)The USBMODE register sets the USB mode for the USB controller. The possible modesare Device, Host, and Idle mode.24.6.16.1 Device modeTable 483. Port states as described by the PE and SUSP bits in the PORTSC1 registerPE bit SUSP bit Port state0 0 or 1 disabled1 0 enabled1 1 suspendTable 484. USB Mode register in device mode (USBMODE_D - address 0x4000 71A8) bit descriptionBit Symbol Value Description ResetvalueAccess1:0 CM1_0 Controller modeThe controller defaults to an idle state and needs to be initialized to thedesired operating mode after reset. This register can only be written onceafter reset. If it is necessary to switch modes, software must reset thecontroller by writing to the RESET bit in the USBCMD register beforereprogramming this register.00 R/ WO0x0 Idle0x1 Reserved0x2 Device controller0x3 Host controller2 ES Endian selectThis bit can change the byte ordering of the transfer buffers to match thehost microprocessor bus architecture. The bit fields in the microprocessorinterface and the DMA data structures (including the setup buffer within thedevice QH) are unaffected by the value of this bit, because they are basedupon 32-bit words.0 R/W0 Little endian: first byte referenced in least significant byte of 32-bit word.1 Big endian: first byte referenced in most significant byte of 32-bit word.3 SLOM Setup Lockout modeIn device mode, this bit controls behavior of the setup lock mechanism. SeeSection 23.10.8.0 R/W0 Setup Lockouts on1 Setup Lockouts Off (DCD requires the use of Setup Buffer Tripwire inUSBCMD)