UM10503 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.User manual Rev. 1.3 — 6 July 2012 924 of 1269NXP Semiconductors UM10503Chapter 34: LPC43xx Windowed Watchdog timer (WWDT)34.8 Block diagramThe block diagram of the Watchdog is shown below in the Figure 108. Thesynchronization logic (PCLK - WDCLK) is not shown in the block diagram.34.9 Watchdog timing examplesThe following figures illustrate several aspects of Watchdog Timer operation is shownbelow in Figure 109.Table 779. Watchdog Timer Window register (WINDOW - 0x4008 0018) bit descriptionBit Symbol Description Reset value23:0 WDWINDOW Watchdog window value. 0xFF FFFF31:24 - Reserved, user software should not write ones to reservedbits. The value read from a reserved bit is not defined.NAFig 108. Watchdog block diagramwatchdoginterruptWDRESET(WDMOD[1])WDTOF(WDMOD[2])WDINT(WDMOD[3])WDEN(WDMOD[0])chip reset÷4feed errorfeed okwd_clk enable countWDMODregistercompareWDTVcompareinrangeunderflowfeed sequencedetect andprotectionWDFEEDfeed okfeed okcompare0interruptcompareWDCLKSELclockselect24-bit down counterWDINTVALWDWINDWDTCshadow bitWDPROTECT(WDMOD[4])WDTC write